The subject matter disclosed herein relates to electronic devices, and more particularly, to press-pack semiconductor modules using power overlay interconnections.
In various power electronic systems, press-pack semiconductor packages may be used to control power distribution to the various applications and devices of the power electronic system. A press-pack semiconductor package may generally include a number of semiconductor chips which function as current switches for relatively high voltage ranges. The semiconductors used in the package may have certain limitations, such as maximum breakdown voltage and current carrying capability. Due to the blocking voltage limitations of each individual semiconductor, several semiconductors may be connected in series to achieve the required voltage and to function in a higher power system. For example, insulated gate bipolar transistors (IGBTs) may have a relatively low voltage breakdown, and several IGBTs may be interconnected within a semiconductor package in parallel for high current capability and several IGBT packages could be connected in series in a stack to meet high voltage requirements, and hence allow switching in relatively high power applications. Furthermore, due to the need for high current in power electronic systems, semiconductor chips may also be arranged in sub-groups within a semiconductor package. For example, several groups of series-connected IGBTs may also be arranged in parallel in the package.
The semiconductor chips in a press-pack semiconductor stack may be interconnected by contacting the sides (e.g., the top and bottom side) of the semiconductor chips with two conductive plates. To ensure connections with all the semiconductor chips in the package, the two conductive plates may exert some amount of pressure against the contact points of all the semiconductors in the package. However, the commercial state of the art of semiconductor packages may use complex interconnections due to the many semiconductor chips used for higher power applications and/or the many sub-groups of chips arranged in the package. Further, the contact points of all the chips in a package may not be precisely planar across the entire package. As such, the amount of pressure exerted by the conductive plates to interconnect the semiconductor chips may be calibrated and/or manipulated to ensure chip interconnection while preventing chip damage.
Springs may be used in press-pack semiconductor packages to compensate for imprecise forces exerted to each semiconductor chip across the press-pack package. For example, a spring may be positioned at the contact points of each semiconductor chip to provide compressional force against some range of force applied by either or both of the conductive plates. However, in complex designs of commercial semiconductor packages, and with the small sizes of existing semiconductor chips, typical springs may not be sufficient to accurately align with the semiconductor chips in the package.